Simulation-based Synthesis of Composite Dispatching Rules

This paper describes the simulation-based synthesis of optimum dispatching rules for the wafer test area of a semiconductor production plant. The target of the optimisation task is the minimum average lead time under the constraint of maintaining on-time delivery. Dispatching is a very fast and robust technique for sequence-planning even when cycle times are not perfectly controlled. A broad range of standard dispatching rules can be found in the literature, each with its own strengths and weaknesses. Less information is available on the use of combinations of these rules. An analysis of the properties that influence the lead times and delivery dates of the lots in the facility shows that composite dispatching rules need to be used to meet the specified target. In this paper we describe how simulation is used to explore the design space of composite dispatching rules. Based on a simulation model of the entire wafer test area, we have tested various combinations of dispatching rules under realistic operating conditions. The optimum rule combination thus found leads to an average lead time reduction of 15% while maintaining, or improving, on-time delivery.